Port disassembler to new API
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86bcc094fa
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7234E476BF21C61A
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#!/usr/bin/env python3
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# synacor.py - An implementation of the Synacor Challenge
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# Copyright © 2017 RunasSudo
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#
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# This program is free software: you can redistribute it and/or modify
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# it under the terms of the GNU Affero General Public License as published by
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# the Free Software Foundation, either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU Affero General Public License for more details.
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#
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# You should have received a copy of the GNU Affero General Public License
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# along with this program. If not, see <http://www.gnu.org/licenses/>.
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from libsynacor import *
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import sys
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with open(sys.argv[1], 'rb') as data:
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SYN_MEM = memory_from_file(data)
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def escape_char(char):
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return char.replace('\\', '\\\\').replace('\n', '\\n').replace('"', '\\"')
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MODE_OUT = False
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MODE_DAT = False #False, 1 (data), 2 (text)
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SYN_PTR = 0
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while SYN_PTR < len(SYN_MEM):
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word = SYN_MEM[SYN_PTR]
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if MODE_OUT and word != 19:
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print('"')
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MODE_OUT = False
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if MODE_DAT and 0 <= word <= 21:
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if MODE_DAT == 1:
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print()
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if MODE_DAT == 2:
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print('"')
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MODE_DAT = False
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if word not in instructions_by_opcode:
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# Data
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if 32 <= word <= 126:
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# looks like letters - unfortunately "\n" looks like MULT
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if MODE_DAT == 2:
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print(escape_char(chr(word)), end='')
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else:
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if MODE_DAT == 1:
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print()
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print('{:04x}: data "{}'.format(SYN_PTR, escape_char(chr(word))), end='')
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MODE_DAT = 2
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if word == 0x0a:
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print('"')
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MODE_DAT = False # break on newlines
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else:
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if MODE_DAT == 1:
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print(' {:04x}'.format(word), end='')
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else:
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if MODE_DAT == 2:
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print('"')
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print('{:04x}: data {:04x}'.format(SYN_PTR, word), end='')
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MODE_DAT = 1
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SYN_PTR += 1
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else:
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# Instruction
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instruction, SYN_PTR = Instruction.next_instruction(SYN_MEM, SYN_PTR)
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# Special cases
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if isinstance(instruction, InstructionOut):
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if isinstance(instruction.args[0], OpLiteral):
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if MODE_OUT:
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print(escape_char(chr(instruction.args[0].get(None))), end='')
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else:
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print('{:04x}: out "{}'.format(SYN_PTR, escape_char(chr(instruction.args[0].get(None)))), end='')
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MODE_OUT = True
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if instruction.args[0].get(None) == 0x0a:
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print('"')
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MODE_OUT = False # break on newlines
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else:
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if MODE_OUT:
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print('"')
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MODE_OUT = False
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print('{:04x}: {}'.format(SYN_PTR, instruction.describe()))
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else:
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print('{:04x}: {}'.format(SYN_PTR, instruction.describe()))
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@ -30,6 +30,9 @@ class OpLiteral(Operand):
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return self.value
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def set(self, cpu, value):
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raise Exception('Attempted to set literal value {} to {} at {}'.format(self.value, value, cpu.SYN_PTR))
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def describe(self):
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return '{:04x}'.format(self.value)
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class OpRegister(Operand):
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def __init__(self, register):
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@ -38,6 +41,9 @@ class OpRegister(Operand):
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return cpu.SYN_REG[self.register]
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def set(self, cpu, value):
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cpu.SYN_REG[self.register] = value
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def describe(self):
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return 'R{}'.format(self.register)
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instructions_by_opcode = {}
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instructions_by_name = {}
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@ -58,6 +64,12 @@ class Instruction:
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def __init__(self):
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self.args = []
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def describe(self):
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description = '{: <4}'.format(self.name)
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for i in range(self.nargs):
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description += ' {}'.format(self.args[i].describe())
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return description
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@staticmethod
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def next_instruction(data, idx):
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opcode = Operand.read_op(data[idx])
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154
tools/disasm.py
154
tools/disasm.py
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@ -1,154 +0,0 @@
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#!/usr/bin/env python3
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# synacor.py - An implementation of the Synacor Challenge
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# Copyright © 2017 RunasSudo
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#
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# This program is free software: you can redistribute it and/or modify
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# it under the terms of the GNU Affero General Public License as published by
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# the Free Software Foundation, either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU Affero General Public License for more details.
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#
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# You should have received a copy of the GNU Affero General Public License
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# along with this program. If not, see <http://www.gnu.org/licenses/>.
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import struct # for bytes<-->word handling
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import sys # for args
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class OpLiteral:
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def __init__(self, value):
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self.value = value;
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def get(self):
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return '{:04x}'.format(self.value);
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def set(self):
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return '{:04x}'.format(self.value);
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class OpRegister:
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def __init__(self, register):
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self.register = register;
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def get(self):
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return 'R{}'.format(self.register);
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def set(self):
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return 'R{}'.format(self.register);
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def readWord():
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byteData = data.read(2)
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if len(byteData) < 2:
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return None
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return struct.unpack('<H', byteData)[0]
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def readOp():
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word = readWord()
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if 0 <= word <= 32767:
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return OpLiteral(word)
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if 32768 <= word <= 32775:
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return OpRegister(word - 32768)
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raise Exception('Invalid word {} at {}'.format(word, SYN_PTR))
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def escapeChar(char):
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return char.replace('\\', '\\\\').replace('\n', '\\n').replace('"', '\\"')
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MODE_OUT = False
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MODE_DAT = False #False, 1 (data), 2 (text)
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with open(sys.argv[1], 'rb') as data:
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while True:
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pos = int(data.tell() / 2)
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word = readWord()
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if word == None:
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break
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if MODE_OUT and word != 19:
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print('"')
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MODE_OUT = False
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if MODE_DAT and 0 <= word <= 21:
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if MODE_DAT == 1:
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print()
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if MODE_DAT == 2:
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print('"')
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MODE_DAT = False
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if word == 21: #NOP
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print('{:04x} nop'.format(pos))
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elif word == 0: #HALT
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print('{:04x} halt'.format(pos))
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elif word == 1: #SET
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print('{:04x} set {} {}'.format(pos, readOp().set(), readOp().get()))
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elif word == 2: #PUSH
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print('{:04x} push {}'.format(pos, readOp().get()))
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elif word == 3: #POP
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print('{:04x} pop {}'.format(pos, readOp().set()))
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elif word == 4: #EQ
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print('{:04x} eq {} {} {}'.format(pos, readOp().set(), readOp().get(), readOp().get()))
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elif word == 5: #GT
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print('{:04x} gt {} {} {}'.format(pos, readOp().set(), readOp().get(), readOp().get()))
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elif word == 6: #JMP
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print('{:04x} jmp {}'.format(pos, readOp().get()))
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elif word == 7: #JT (jump if not zero)
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print('{:04x} jt {} {}'.format(pos, readOp().get(), readOp().get()))
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elif word == 8: #JF (jump if zero)
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print('{:04x} jf {} {}'.format(pos, readOp().get(), readOp().get()))
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elif word == 9: #ADD
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print('{:04x} add {} {} {}'.format(pos, readOp().set(), readOp().get(), readOp().get()))
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elif word == 10: #MULT
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print('{:04x} mult {} {} {}'.format(pos, readOp().set(), readOp().get(), readOp().get()))
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elif word == 11: #MOD
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print('{:04x} mod {} {} {}'.format(pos, readOp().set(), readOp().get(), readOp().get()))
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elif word == 12: #AND
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print('{:04x} and {} {} {}'.format(pos, readOp().set(), readOp().get(), readOp().get()))
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elif word == 13: #OR
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print('{:04x} or {} {} {}'.format(pos, readOp().set(), readOp().get(), readOp().get()))
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elif word == 14: #NOT
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print('{:04x} not {} {}'.format(pos, readOp().set(), readOp().get()))
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elif word == 15: #RMEM
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print('{:04x} rmem {} {}'.format(pos, readOp().set(), readOp().get()))
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elif word == 16: #WMEM
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print('{:04x} wmem {} {}'.format(pos, readOp().set(), readOp().get()))
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elif word == 17: #CALL
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print('{:04x} call {}'.format(pos, readOp().get()))
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elif word == 18: #RET
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print('{:04x} ret'.format(pos))
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elif word == 19: #OUT
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op = readOp()
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if isinstance(op, OpLiteral):
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if MODE_OUT:
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print(escapeChar(chr(op.value)), end='')
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else:
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print('{:04x} out "{}'.format(pos, escapeChar(chr(op.value))), end='')
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MODE_OUT = True
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if op.value == 0x0a:
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print('"')
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MODE_OUT = False # break on newlines
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else:
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if MODE_OUT:
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print('"')
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MODE_OUT = False
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print('{:04x} out {}'.format(pos, op.get(), end=''))
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elif word == 20: #IN
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print('{:04x} in {}'.format(pos, readOp().set()))
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else:
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if 32 <= word <= 126:
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# looks like letters - unfortunately "\n" looks like MULT
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if MODE_DAT == 2:
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print(escapeChar(chr(word)), end='')
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else:
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if MODE_DAT == 1:
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print()
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print('{:04x} data "{}'.format(pos, escapeChar(chr(word))), end='')
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MODE_DAT = 2
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if word == 0x0a:
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print('"')
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MODE_DAT = False # break on newlines
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else:
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if MODE_DAT == 1:
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print(' {:04x}'.format(word), end='')
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else:
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if MODE_DAT == 2:
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print('"')
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print('{:04x} data {:04x}'.format(pos, word), end='')
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MODE_DAT = 1
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